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Mostrando entradas de enero, 2017

3rd IEEE Colombian Conference on Automatic Control

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SCOPE The objective of the Conference is to gather academic and industrial researchers and practitioners, to discuss the state of the art, research and developments in advance control-robotics and its applications for sharing and encouraging technology development in Colombia and the Latin American region. The thematic emphasis of the Conference will be covering the theory, the implementation issues and the experiences related to the applications of control, automation and robotics methods in research, academy and industry. The main topics for the event include, but are not limited to, the following: Applied control for industrial and non-industrial areas, applied control for robots, hybrid systems, intelligent control, mechatronics, mobile robots, modeling of dynamic systems, multi-robot systems, process and power systems, process automation, process optimization, sensing and sensor fusion, system identification, systems and signals, control in power electronics

18th IEEE Latin-American Test Symposium

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CALL FOR PAPERS The IEEE Latin-American Test Symposium (LATS, previously Latin-American Test Workshop - LATW) is a recognized  forum for test and fault tolerance professionals and technologists from all over the world, in particular from Latin  America, to present and discuss various aspects of system, board, and component testing and fault-tolerance with  design, manufacturing and field considerations in mind. Presented papers are also published in the IEEE Xplore  Digital Library. The best papers of the 18th LATS will be invited to re-submit to IEEE Design and Test of Computers,  Journal of Electronic Testing: Theory and Applications - JETTA (Springer), Journal of Low Power Electronics - JOLPE  (American Scientific Publishers), and IEEE Transactions on Computer-Aided Design (TCAD). Topics of interest include but are not limited to: -Analog Mixed Signal Test -Automatic Test Generation -Built-In Self-Test -Defect-Based Test -Design and Synthesis for Testability -Design for